CCZ-injected MAJ

The majority carry slice consumes a caller-supplied CCZ state. Its interface exposes the next carry together with the intermediate wires needed by the UMA slice.

Block graph

BLOG source

BLOG 1.0

module main {
  in ccz_1: ccz = 0
  in ccz_3: ccz = 1
  in ccz_2: ccz = 2
  in i_prime_k: data = 6
  in c_k: data = 35
  in t_k: data = 81
  out c_k_plus_1: data = 50
  out c_k_out: data = 56
  out c_k_plus_1_duplicate: data = 67
  out c_k_xor_i_prime_k: data = 70
  out c_k_xor_t_k: data = 80

  0: Port [-1, 0, 2] role=input <CCZ_1>
  1: Port [-1, 1, 2] role=input <CCZ_3>
  2: Port [-1, 2, 2] role=input <CCZ_2>
  3: XXZ [0, 0, 0]
  4: XZZ [0, 0, 1]
  5: XZX [0, 0, 2]
  6: Port [0, 1, -1] role=input <i_prime_k>
  7: XZZ [0, 1, 0]
  8: XXZ [0, 1, 1]
  9: ZZX [0, 1, 2]
  10: ZZX [0, 1, 3]
  11: XZX [0, 1, 4]
  12: XZ [0, 1, 5]
  13: XZZ [0, 2, 0]
  14: XZZ [0, 2, 1]
  15: ZZX [0, 2, 2]
  16: ZXX [0, 2, 3]
  17: ZXZ [0, 2, 4]
  18: XZ [0, 2, 5]
  19: XXZ [1, 0, 0]
  20: XXZ [1, 0, 1]
  21: XZX [1, 0, 2]
  22: XZX [1, 0, 3]
  23: ZXX [1, 0, 4]
  24: XZ [1, 0, 5]
  25: XXZ [1, 1, 0]
  26: XXZ [1, 1, 1]
  27: ZZX [1, 1, 2]
  28: ZZX [1, 1, 3]
  29: ZZX [1, 1, 4]
  30: XZX [1, 2, 1]
  31: XZX [1, 2, 2]
  32: ZXX [1, 2, 3]
  33: ZXZ [1, 2, 4]
  34: XZ [1, 2, 5]
  35: Port [2, -1, 0] role=input <c_k>
  36: XXZ [2, 0, 0]
  37: ZXZ [2, 0, 1]
  38: ZXZ [2, 0, 2]
  39: ZXZ [2, 0, 3]
  40: ZXZ [2, 1, 0]
  41: ZXZ [2, 1, 1]
  42: XZX [2, 1, 2]
  43: XZX [2, 1, 3]
  44: XZX [2, 1, 4]
  45: XXZ [2, 2, 0]
  46: ZZX [2, 2, 1]
  47: ZXZ [2, 2, 2]
  48: ZXZ [2, 2, 3]
  49: ZXZ [2, 2, 4]
  50: Port [2, 3, 0] role=output <c_k_plus_1>
  51: ZXZ [3, 0, 0]
  52: ZXX [3, 0, 1]
  53: ZXX [3, 0, 2]
  54: ZXZ [3, 0, 3]
  55: ZXX [3, 0, 4]
  56: Port [3, 0, 5] role=output <c_k_out>
  57: XXZ [3, 1, 0]
  58: ZZX [3, 1, 1]
  59: ZXX [3, 1, 2]
  60: ZXX [3, 1, 3]
  61: ZXX [3, 1, 4]
  62: XXZ [3, 2, 0]
  63: ZZX [3, 2, 1]
  64: ZXZ [3, 2, 2]
  65: ZZX [3, 2, 3]
  66: ZXZ [3, 2, 4]
  67: Port [3, 2, 5] role=output <c_k_plus_1_duplicate>
  68: ZXZ [4, 0, 3]
  69: ZXZ [4, 0, 4]
  70: Port [4, 0, 5] role=output <c_k_xor_i_prime_k>
  71: XZX [4, 1, 1]
  72: XZZ [4, 1, 2]
  73: XZX [4, 1, 3]
  74: XZZ [4, 1, 4]
  75: ZXZ [4, 2, 0]
  76: ZXZ [4, 2, 1]
  77: ZXZ [4, 2, 2]
  78: XZX [4, 2, 3]
  79: XZZ [4, 2, 4]
  80: Port [4, 2, 5] role=output <c_k_xor_t_k>
  81: Port [5, 1, 3] role=input <t_k>
  0 -> +X
  1 -> +X
  2 -> +X
  3 -> +Y
  3 -> +X
  4 -> +Z
  4 -> +Y
  5 -> +X
  6 -> +Z
  7 -> +Y
  8 -> +Y
  8 -> +X
  9 -> +X
  10 -> +Y
  10 -> +X
  11 -> +Z
  11 -> +X
  13 -> +Z
  15 -> +X
  16 -> +Z
  17 -> +Z
  19 -> +Y
  19 -> +X
  20 -> +Y
  20 -> +X
  21 -> +Z
  22 -H> +Z
  23 -> +Z
  23 -> +Y
  25 -> +X
  27 -> +X
  28 -> +Y
  28 -> +X
  29 -> +X
  30 -> +Z
  30 -> +X
  31 -H> +Z
  32 -> +Z
  33 -> +Z
  35 -> +Y
  36 -> +X
  37 -> +Z
  38 -> +Z
  39 -> +X
  40 -> +Z
  40 -> +X
  41 -H> +Z
  42 -> +Z
  43 -> +Z
  45 -> +Y
  45 -> +X
  46 -> +X
  47 -> +Z
  47 -> +X
  48 -> +Z
  49 -> +X
  51 -> +Z
  52 -> +Z
  52 -> +Y
  53 -> +Y
  54 -> +X
  55 -> +Z
  55 -> +Y
  57 -> +Y
  58 -> +Y
  58 -> +X
  59 -> +Z
  60 -> +Z
  60 -> +Y
  62 -> +X
  64 -> +X
  65 -> +X
  66 -> +Z
  68 -> +Z
  69 -> +Z
  71 -> +Z
  72 -> +Z
  73 -> +Z
  73 -> +X
  74 -> +Y
  75 -> +Z
  76 -> +Z
  78 -> +Z
  79 -> +Z

  mt1 = measure 0 -> +X
  mt2 = measure 2 -> +X
  resolve 18 if !mt1
  resolve 34 if mt1
  resolve 12 if !mt2
  resolve 24 if mt2
  feedback X 50, X 67 if mt1 & mt2

}

See BLOG Format for the syntax or return to all examples.