UMA¶
The unmajority-and-add slice consumes the carry-stage intermediate wires and extracts a sum output. Named measurements select the final caps, providing the adaptive uncomputation step.
Block graph¶
BLOG source¶
BLOG 1.0
module main {
in c_k: data = 5
in c_k_plus_1: data = 10
in c_k_xor_i_prime_k: data = 13
in c_k_xor_t_k: data = 18
out out_k: data = 21
0: ZZX [-1, 0, 0]
1: XXZ [-1, 0, 1]
2: ZZX [-1, 1, 0]
3: XXZ [-1, 1, 1]
4: XXZ [-1, 2, 1]
5: Port [0, 0, -1] <c_k>
6: XZX [0, 0, 0]
7: ZXZ [0, 0, 1]
8: XZX [0, 1, 0]
9: ZXZ [0, 1, 1]
10: Port [0, 2, -1] <c_k+1>
11: ZXZ [0, 2, 0]
12: ZXZ [0, 2, 1]
13: Port [1, 0, -1] <ck_xor_qik>
14: ZXX [1, 0, 0]
15: ZXZ [1, 0, 1]
16: ZZX [1, 1, 0]
17: XXZ [1, 1, 1]
18: Port [1, 2, -1] <ck_xor_tk>
19: ZXX [1, 2, 0]
20: XZZ [1, 2, 1]
21: Port [2, 0, 1] role=output <out_k>
22: ZZX [2, 1, 0]
23: ZXZ [2, 1, 1]
24: XZ [2, 1, 2] <fix_0>
25: ZXX [2, 2, 0]
26: ZXZ [2, 2, 1]
27: XZ [2, 2, 2] <fix_1>
0 -> +Y
0 -> +X
1 -> +Y
1 -> +X
2 -> +X
3 -> +Y
3 -> +X
4 -> +X
5 -H> +Z
6 -H> +Z
7 -> +X
8 -H> +Z
8 -> +X
9 -> +X
10 -> +Z
11 -> +Z
13 -> +Z
14 -> +Z
14 -> +Y
15 -> +X
16 -> +Y
16 -> +X
17 -> +Y
17 -> +X
18 -H> +Z
19 -H> +Z
22 -> +Y
23 -> +Z
25 -> +Z
26 -> +Z
m_ikprime = measure 14
m_anc = measure 0 -> +X
resolve 24 if !m_anc
resolve 27 if !m_anc
}
See BLOG Format for the syntax or return to all examples.